Abstract: SRAM FPGA is increasingly important in space use because of its excellent performance. In the space environment, however, SRAM FPGA is vulnerable to single event upsets (SEUs), which may lead to logic faults or function interrupts. This paper proposes an SEU-tolerant design by using scrubbing after read-back comparison for the configuration logic part, and using self-correction macro for the BRAM part. This approach is shown to have satisfactory hardening effect against SEUs.