SRAM型FPGA空间应用的抗单粒子翻转设计
SEU-tolerant design for SRAM based FPGA on spacecraft
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摘要: SRAM型FPGA容易受到空间辐射环境引起的单粒子翻转(SEU)的影响,造成FPGA逻辑错误和功能中断,因此空间应用时必须对其进行抗单粒子翻转加固设计,提高其空间应用的可靠性。文章综述了几种FPGA抗单粒子翻转的设计方法,包括三模冗余设计、动态刷新设计和动态部分可重构设计等。利用构建的测试系统,验证以上多种FPGA抗单粒子翻转设计方法的工程可实施性。Abstract: The SRAM-based FPGA is susceptible to single event upsets (SEU).Due to the effects and the errors induced by SEU, the function of the SRAM-based FPGA might be interrupted. The SEU-tolerant methods are designed for space applications, to improve the reliability of the SRAM-based FPGA on spacecraft. This paper reviews several SEU-tolerant methods, such as the triple modular redundancy(TMR) method, the scrubbing method and the FPGA dynamic partial reconfiguration technology.